Public Types | Public Member Functions | Private Member Functions | Private Attributes | List of all members
walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T > Class Template Reference

#include <NonuniformGPUCommData.h>

Public Types

using Stencil = typename LatticeStorageSpecification_T::Stencil
 
using CommunicationStencil = typename LatticeStorageSpecification_T::CommunicationStencil
 

Public Member Functions

 NonuniformGPUCommData (IBlock *const block, uint_t xSize, uint_t ySize, uint_t zSize)
 
bool operator== (const NonuniformGPUCommData &other)
 
bool operator!= (const NonuniformGPUCommData &other)
 
PartialCoalescenceMaskField & getMaskField ()
 
const PartialCoalescenceMaskField & getMaskField () const
 
PartialCoalescenceMaskFieldGPU & getMaskFieldGPU ()
 
const PartialCoalescenceMaskFieldGPU & getMaskFieldGPU () const
 

Private Member Functions

void registerFlags ()
 
void computeBitMask ()
 Computes the partial coalescence bit mask on the mask field. More...
 
void syncDataGPU ()
 
void prepareIntervals ()
 
void setFlagOnInterval (const CellInterval &ci, const uint_t fIdx)
 
void setupCornerSkippingOrigins (stencil::Direction commDir)
 Sets up the feasible space for the given communication direction. More...
 
void setupBitMaskSlice (stencil::Direction commDir, stencil::Direction streamDir)
 
bool haveSmallestIdInIntersection (Vector3< cell_idx_t > cornerDir)
 Determines whether the current block has the smallest BlockID among all fine blocks of a given intersection volume. More...
 

Private Attributes

const IBlock *const block_
 
PartialCoalescenceMaskField maskField_
 
PartialCoalescenceMaskFieldGPU maskFieldGPU_
 
const CellInterval interiorInterval
 
std::vector< CellInterval > passThroughIntervals_
 
std::vector< CellInterval > cornerSkippingOriginIntervals_
 

Member Typedef Documentation

◆ CommunicationStencil

template<typename LatticeStorageSpecification_T >
using walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::CommunicationStencil = typename LatticeStorageSpecification_T::CommunicationStencil

◆ Stencil

template<typename LatticeStorageSpecification_T >
using walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::Stencil = typename LatticeStorageSpecification_T::Stencil

Constructor & Destructor Documentation

◆ NonuniformGPUCommData()

template<typename LatticeStorageSpecification_T >
walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::NonuniformGPUCommData ( IBlock *const  block,
uint_t  xSize,
uint_t  ySize,
uint_t  zSize 
)
inline

Member Function Documentation

◆ computeBitMask()

template<typename LatticeStorageSpecification_T >
void walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::computeBitMask
private

Computes the partial coalescence bit mask on the mask field.

Assumes that all flags are already registered at the field, and that the field has been initialized to zero.

◆ getMaskField() [1/2]

template<typename LatticeStorageSpecification_T >
PartialCoalescenceMaskField& walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::getMaskField ( )
inline

◆ getMaskField() [2/2]

template<typename LatticeStorageSpecification_T >
const PartialCoalescenceMaskField& walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::getMaskField ( ) const
inline

◆ getMaskFieldGPU() [1/2]

template<typename LatticeStorageSpecification_T >
PartialCoalescenceMaskFieldGPU& walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::getMaskFieldGPU ( )
inline

◆ getMaskFieldGPU() [2/2]

template<typename LatticeStorageSpecification_T >
const PartialCoalescenceMaskFieldGPU& walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::getMaskFieldGPU ( ) const
inline

◆ haveSmallestIdInIntersection()

template<typename LatticeStorageSpecification_T >
bool walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::haveSmallestIdInIntersection ( Vector3< cell_idx_t >  cornerDir)
inlineprivate

Determines whether the current block has the smallest BlockID among all fine blocks of a given intersection volume.

Template Parameters
LatticeStorageSpecification_T
Parameters
cornerDir
Returns

◆ operator!=()

template<typename LatticeStorageSpecification_T >
bool walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::operator!= ( const NonuniformGPUCommData< LatticeStorageSpecification_T > &  other)
inline

◆ operator==()

template<typename LatticeStorageSpecification_T >
bool walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::operator== ( const NonuniformGPUCommData< LatticeStorageSpecification_T > &  other)
inline

◆ prepareIntervals()

template<typename LatticeStorageSpecification_T >
void walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::prepareIntervals ( )
private

◆ registerFlags()

template<typename LatticeStorageSpecification_T >
void walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::registerFlags
private

◆ setFlagOnInterval()

template<typename LatticeStorageSpecification_T >
void walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::setFlagOnInterval ( const CellInterval &  ci,
const uint_t  fIdx 
)
private

◆ setupBitMaskSlice()

template<typename LatticeStorageSpecification_T >
void walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::setupBitMaskSlice ( stencil::Direction  commDir,
stencil::Direction  streamDir 
)
inlineprivate

◆ setupCornerSkippingOrigins()

template<typename LatticeStorageSpecification_T >
void walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::setupCornerSkippingOrigins ( stencil::Direction  commDir)
inlineprivate

Sets up the feasible space for the given communication direction.

Additionally to the field interior, marks every ghost layer slice corresponding to an adjacent coarse block, and the corresponding corner as feasible, if that corner also belongs to a coarse block and the current block has the smallest BlockID participating in the intersection.

Parameters
commDirA communication direction pointing toward an adjacent coarse block

◆ syncDataGPU()

template<typename LatticeStorageSpecification_T >
void walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::syncDataGPU
private

Member Data Documentation

◆ block_

template<typename LatticeStorageSpecification_T >
const IBlock* const walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::block_
private

◆ cornerSkippingOriginIntervals_

template<typename LatticeStorageSpecification_T >
std::vector< CellInterval > walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::cornerSkippingOriginIntervals_
private

◆ interiorInterval

template<typename LatticeStorageSpecification_T >
const CellInterval walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::interiorInterval
private

◆ maskField_

template<typename LatticeStorageSpecification_T >
PartialCoalescenceMaskField walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::maskField_
private

◆ maskFieldGPU_

template<typename LatticeStorageSpecification_T >
PartialCoalescenceMaskFieldGPU walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::maskFieldGPU_
private

◆ passThroughIntervals_

template<typename LatticeStorageSpecification_T >
std::vector< CellInterval > walberla::lbm_generated::NonuniformGPUCommData< LatticeStorageSpecification_T >::passThroughIntervals_
private
The documentation for this class was generated from the following files: